//    Copyright (C) 2010 by Dolphin Technolo
//    All rights reserved.
// 
//    Copyright Notification
//    No part may be reproduced except as authorized by written permission
// 
//    @file   dti_asym_outbuf_tb.v
//    @par    Company:
//              Dolphin Technology
//    @par    Project:
//              [projectname]
//    @par    Author:
//              N. Huy Bui
//    @par    Date:
//              July 17, 2012
//    @brieft
//              [a brieft description of the module]
//$Id$

module dti_asym_outbuf_tb;

parameter 	  IN_WIDTH    = 24;
parameter 	  OUT_WIDTH   = 8;
parameter 	  BYTE_ORDER  = 1;
parameter 	  ERR_MODE    = 1;

reg 		  pop_clk_inst;
reg 		  pop_rst_n_inst;
reg 		  pop_req_n_inst;
reg 		  fifo_empty_inst;
reg 	  [IN_WIDTH-1:0] data_in_inst;
wire 	  [OUT_WIDTH-1:0] data_out_inst;
wire 		  pop_wd_n_inst;
wire 		  part_wd_inst;
wire 		  pop_error_inst;

initial 
begin
  pop_clk_inst = 0;
  pop_rst_n_inst = 0;
  pop_req_n_inst = 1;
  fifo_empty_inst = 0;
  data_in_inst = 24'b010111010001110111010011;

  #12 pop_rst_n_inst = 1;
  #10 pop_req_n_inst = 0;
  #5 pop_req_n_inst = 1;
  #10 pop_req_n_inst = 0;
  #5 pop_req_n_inst = 1;
  #12 pop_req_n_inst = 0;
  #10 data_in_inst = 24'b010101111010111100110101;
  #7 pop_req_n_inst = 1;
  #12 pop_req_n_inst = 0;
  #5 pop_req_n_inst = 1;
  #10 pop_req_n_inst = 0;
  #2 fifo_empty_inst = 1;
  #15 $finish;
end

always #5 pop_clk_inst = ~pop_clk_inst;

dti_asym_outbuf #(IN_WIDTH, OUT_WIDTH, BYTE_ORDER, ERR_MODE)
  dti_asym_outbuf_inst (
	.pop_clk (pop_clk_inst),
	.pop_rst_n (pop_rst_n_inst),
	.pop_req_n (pop_req_n_inst),
	.fifo_empty (fifo_empty_inst),
	.data_in (data_in_inst),
	.data_out (data_out_inst),
	.pop_wd_n (pop_wd_n_inst),
	.part_wd (part_wd_inst),
	.pop_error (pop_error_inst));

endmodule // dti_asym_outbuf_tb
